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diff --git a/flash-memory/mtd/pres_mtd_en.tex b/flash-memory/mtd/pres_mtd_en.tex
index 398a591..9cf294b 100644
--- a/flash-memory/mtd/pres_mtd_en.tex
+++ b/flash-memory/mtd/pres_mtd_en.tex
@@ -72,4 +72,111 @@
\end{itemize}
\end{frame}
+\subsubsection{MTD Error Correction}
+
+\begin{frame}
+\frametitle{Kernel Support}
+\begin{itemize}
+\item Software ECC
+\begin{itemize}
+\item single bitflips (Hamming code) \\ 3 byte ECC per 256/512 byte
+\item multiple bitflips (BCH code) \\ e.g. 7 byte ECC per 512 byte (4 bitflips)
+\end{itemize}
+\item Hardware ECC
+\begin{itemize}
+\item depends on NAND Hardware capabilities
+\end{itemize}
+\end{itemize}
+\end{frame}
+
+\begin{frame}
+\frametitle{ECC variations}
+\begin{beamerboxesrounded}[shadow=true]{Software ECC}
+\begin{itemize}
+\item full flexibility
+\item performance on small CPUs
+\end{itemize}~\\
+\begin{figure}[h]
+\centering
+\includegraphics[scale=0.5]{images/nand_ecc_sw.png}
+\end{figure}
+\end{beamerboxesrounded}
+\end{frame}
+
+\begin{frame}
+\frametitle{ECC variations}
+\begin{beamerboxesrounded}[shadow=true]{Hardware-assisted ECC}
+\begin{itemize}
+\item restricted to HW Algorithms
+\item good performance on small CPUs
+\end{itemize}~\\
+\begin{figure}[h]
+\centering
+\includegraphics[scale=0.5]{images/nand_ecc_hw_part.png}
+\end{figure}
+\end{beamerboxesrounded}
+\end{frame}
+
+\begin{frame}
+\frametitle{ECC variations}
+\begin{beamerboxesrounded}[shadow=true]{Hardware ECC}
+\begin{itemize}
+\item restricted to HW Algorithms
+\item good performance on small CPUs
+\item transparent usage
+\item different layout requirements
+\end{itemize}~\\
+\begin{figure}[h]
+\centering
+\includegraphics[scale=0.5]{images/nand_ecc_hw_full.png}
+\end{figure}
+\end{beamerboxesrounded}
+\end{frame}
+
+\begin{frame}
+\frametitle{ECC Layout}
+Software ECC
+\begin{itemize}
+\item read data in one step and store ECC in OOB area
+\end{itemize}
+\begin{beamerboxesrounded}[shadow=true]{Software ECC Layout}
+\begin{figure}[h]
+\centering
+\includegraphics[scale=0.5]{images/mtd_ecc_sw.png}
+\end{figure}
+\end{beamerboxesrounded}
+\end{frame}
+
+\begin{frame}
+\frametitle{ECC Layout}
+Full Hardware ECC
+\begin{itemize}
+\item read data in chunks and store ECC aligned
+\item bad block marker in OOB are no longer usable
+\item requires badblock table (BBT)
+\end{itemize}
+\begin{beamerboxesrounded}[shadow=true]{Hardware ECC Layout}
+\begin{figure}[h]
+\centering
+\includegraphics[scale=0.5]{images/mtd_ecc_hw.png}
+\end{figure}
+\end{beamerboxesrounded}
+\end{frame}
+
+\begin{frame}
+\frametitle{ECC pitfalls}
+\begin{itemize}
+\item bootloader:
+\begin{itemize}
+\item algorithm
+\item layout
+\end{itemize}
+\item runtime:
+\begin{itemize}
+\item periodical reads of all UBI partitions
+\item UBI copy PEBs with bitflips to new PEBs
+\end{itemize}
+\end{itemize}
+\end{frame}
+
\input{tailpres}