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diff --git a/misc/pres_dsa_en.tex b/misc/pres_dsa_en.tex new file mode 100644 index 0000000..8e51e98 --- /dev/null +++ b/misc/pres_dsa_en.tex @@ -0,0 +1,328 @@ +\input{configpres} + +\section{Distributed Switch Architecture} + +\title{Distributed Switch Architecture} +\maketitle + +\begin{frame}{Agenda} + \tableofcontents +\end{frame} + +\section{DSA} +\label{sec:dsa} + +\begin{frame}{What is DSA?} + \begin{block}{Distributed Switch Architecture \cite{dsa_doc}} + \begin{itemize} + \item Framework in Linux Kernel to support switches + \item Enables and supports cascaded switch setups + \end{itemize} + \end{block} + \begin{block}{Design Goals \cite{dsa_doc}} + \begin{itemize} + \item Model switch ports as regular network interfaces + \item Allows configuration with standard Linux utilities + \end{itemize} + \end{block} +\end{frame} + +\begin{frame}{Supported Switches} + \begin{block}{Supported Switches} + \begin{itemize} + \item Marvell MV88E6xxx + \item Broadcom B53 and Starfighter 2 + \item Realtek RTL8366 + \item Mediatek MT7530 + \item Microchip LAN9303, KSZ 9477 + \item Vitesse VSC73xx + \end{itemize} + \end{block} +\end{frame} + +\begin{frame}{History} + \begin{block}{Chronic \cite{dsa_slides}} + \begin{itemize} + \item 2008: Introduced first for Marvell switches + \item 2014: Added support for Broadcom SF2 + \item 2015: Added functionality for device tree, VLANs, hardware bridging, ... + \item 2016: Added additional switches + \item 2017: Added additional switches and port mirroring + \item 2018: Added \textbf{PTP} support for Marvell Topaz switches + \end{itemize} + \end{block} +\end{frame} + +\begin{frame}{DSA Structure} + \begin{figure}[htbp] + \centering + \includegraphics[scale=0.45]{images/dsa.png} + \caption{DSA Structure \cite{dsa_paper}} + \label{fig:dsastructure} + \end{figure} +\end{frame} + +\begin{frame}[fragile]{Linux Interface Example} +\begin{Verbatim}[fontsize=\tiny] +# ip link show +1: lo: <LOOPBACK,UP,LOWER_UP> mtu 65536 qdisc noqueue state UNKNOWN mode DEFAULT \ + group default qlen 1000 + link/loopback 00:00:00:00:00:00 brd 00:00:00:00:00:00 +2: eth0: <BROADCAST,MULTICAST,UP,LOWER_UP> mtu 1500 qdisc mq state UP mode DEFAULT \ + group default qlen 1024 + link/ether 52:52:08:6c:37:bb brd ff:ff:ff:ff:ff:ff +3: sit0@NONE: <NOARP> mtu 1480 qdisc noop state DOWN mode DEFAULT group default qlen 1000 + link/sit 0.0.0.0 brd 0.0.0.0 +4: lan0@eth0: <NO-CARRIER,BROADCAST,MULTICAST,UP> mtu 1500 qdisc noqueue master br0 \ + state LOWERLAYERDOWN mode DEFAULT group default qlen 1000 + link/ether 52:52:08:6c:37:bb brd ff:ff:ff:ff:ff:ff +5: lan1@eth0: <BROADCAST,MULTICAST,UP,LOWER_UP> mtu 1500 qdisc noqueue master br0 \ + state UP mode DEFAULT group default qlen 1000 + link/ether 52:52:08:6c:37:bb brd ff:ff:ff:ff:ff:ff +6: lan2@eth0: <NO-CARRIER,BROADCAST,MULTICAST,UP> mtu 1500 qdisc noqueue master br0 \ + state LOWERLAYERDOWN mode DEFAULT group default qlen 1000 + link/ether 52:52:08:6c:37:bb brd ff:ff:ff:ff:ff:ff +7: br0: <BROADCAST,MULTICAST,UP,LOWER_UP> mtu 1500 qdisc noqueue state UP mode DEFAULT \ + group default qlen 1000 + link/ether 52:52:08:6c:37:bb brd ff:ff:ff:ff:ff:ff +\end{Verbatim} +\end{frame} + +\begin{frame}[fragile]{Linux Device Tree Example I} +\begin{Verbatim}[fontsize=\scriptsize] +&mdio { + switch0: switch0@1 { + compatible = "marvell,mv88e6085"; + reg = <1>; + dsa,member = <0 0>; + ports { + port@0 { + reg = <0>; + label = "cpu"; + ethernet = <ð0>; + }; + port@1 { + reg = <1>; + label = "lan0"; + phy-handle = <&switch0phy0>; + }; + }; + }; +}; +\end{Verbatim} +\end{frame} + +\begin{frame}[fragile]{Linux Device Tree Example II} +\begin{Verbatim}[fontsize=\scriptsize] +ð0 { + phy-mode = "rgmii-id"; + status = "okay"; + + fixed-link { + speed = <1000>; + full-duplex; + }; +}; +\end{Verbatim} +\end{frame} + +\begin{frame}{DSA Driver Implementation} + \begin{block}{Driver} + \begin{itemize} + \item Driver has to implement \texttt{dsa\_switch\_ops} + \item Afterwards call \texttt{dsa\_register\_switch()} + \end{itemize} + \end{block} + \begin{block}{DSA Switch Operations} + \begin{itemize} + \item Enabling/Disabling ports + \item VLAN and bridging support + \item PHY and Linkstates + \item Ethtool integration + \end{itemize} + \end{block} +\end{frame} + +\begin{frame}{Switch Tagging} + \begin{block}{Tagging} + \begin{itemize} + \item Ethernet frames between CPU, DSA and master ports have additional data + \item Used for meta data and port control + \end{itemize} + \end{block} + \begin{block}{Current Supported Protocols} + \begin{itemize} + \item DSA, EDSA + \item Broadcom tags + \item KSZ Tail tagging + \item LAN9303 tags, ... + \end{itemize} + \end{block} +\end{frame} + +\begin{frame}{Tagging Example} + \begin{figure}[htbp] + \centering + \includegraphics[scale=0.45]{images/tagging.png} + \caption{Example Switch Tags \cite{dsa_paper}} + \label{fig:dsatags} + \end{figure} +\end{frame} + +\begin{frame}{Frame Processing} + \begin{block}{Receive Path} + \begin{itemize} + \item Master interface calls \texttt{netif\_receive\_skb()} + \item Parse switch tags and select corresponding slave interface + \item Slave interface calls \texttt{netif\_receive\_skb()} + \end{itemize} + \end{block} + \begin{block}{Transmit Path} + \begin{itemize} + \item Slave interface sends frame + \item Tagger adds the corresponding switch tags + \item Frame is passed to master interface and sent to the switch + \end{itemize} + \end{block} +\end{frame} + +\begin{frame}{Distributed Architecture} + \begin{figure}[htbp] + \centering + \includegraphics[scale=0.4]{images/distributed.png} + \caption{Distributed Example \cite{dsa_paper}} + \label{fig:distributed} + \end{figure} +\end{frame} + +\section{Switchdev} +\label{sec:switchdev} + +\begin{frame}{Agenda} + \tableofcontents[currentsection] +\end{frame} + +\begin{frame}{What is switchdev?} + \begin{block}{Switchdev \cite{switchdev_doc}} + \begin{itemize} + \item Switchdev is a framework for configuring switches + \item It is not a device driver model + \end{itemize} + \end{block} + \begin{block}{Design Goals \cite{switchdev_doc}} + \begin{itemize} + \item Model switch ports as regular network interfaces + \item Offload switch constructs to hardware + \end{itemize} + \end{block} +\end{frame} + +\begin{frame}{Switchdev vs. DSA} + \begin{block}{Switchdev vs. DSA} + \begin{itemize} + \item DSA uses Switchdev for hardware offloading + \item DSA exposes a well defined device driver model for Ethernet switches + \item DSA supports switch tagging + \item DSA supports cascading multiple switches + \end{itemize} + \end{block} +\end{frame} + +\section{PTP} +\label{sec:ptp} + +\begin{frame}{Agenda} + \tableofcontents[currentsection] +\end{frame} + +\begin{frame}{DSA and PTP} + \begin{block}{PTP Support} + \begin{itemize} + \item PTP support for DSA was merged in 2018 + \item PTP is implemented for Marvell 88e6xxx driver + \item Timestamping possible for DSA slave devices + \item ptp4l may run on the individual slave devices + \end{itemize} + \end{block} +\end{frame} + +\begin{frame}[fragile]{DSA/PTP Patch Series} +\begin{Verbatim}[fontsize=\scriptsize] + LINK: https://patchwork.ozlabs.org/cover/873211/ + drivers/net/dsa/mv88e6xxx/Kconfig | 10 + + drivers/net/dsa/mv88e6xxx/Makefile | 4 + + drivers/net/dsa/mv88e6xxx/chip.c | 67 ++++ + drivers/net/dsa/mv88e6xxx/chip.h | 103 +++++ + drivers/net/dsa/mv88e6xxx/global2.c | 9 +- + drivers/net/dsa/mv88e6xxx/global2.h | 85 +++- + drivers/net/dsa/mv88e6xxx/global2_avb.c | 193 +++++++++ + drivers/net/dsa/mv88e6xxx/global2_scratch.c | 240 ++++++++++++ + drivers/net/dsa/mv88e6xxx/hwtstamp.c | 584 ++++++++++++++++++++++++++++ + drivers/net/dsa/mv88e6xxx/hwtstamp.h | 172 ++++++++ + drivers/net/dsa/mv88e6xxx/ptp.c | 381 ++++++++++++++++++ + drivers/net/dsa/mv88e6xxx/ptp.h | 108 +++++ + include/linux/ptp_classify.h | 4 + + include/net/dsa.h | 20 + + net/dsa/dsa.c | 36 ++ + net/dsa/slave.c | 59 +++ + 16 files changed, 2070 insertions(+), 5 deletions(-) +\end{Verbatim} +\end{frame} + +\begin{frame}[fragile]{DSA/PTP Callbacks} +PTP Callbacks for DSA ops +\begin{Verbatim}[fontsize=\scriptsize] + struct dsa_switch_ops { + [...] + /* + * PTP functionality + */ + int (*port_hwtstamp_get)(struct dsa_switch *ds, int port, + struct ifreq *ifr); + int (*port_hwtstamp_set)(struct dsa_switch *ds, int port, + struct ifreq *ifr); + bool (*port_txtstamp)(struct dsa_switch *ds, int port, + struct sk_buff *clone, unsigned int type); + bool (*port_rxtstamp)(struct dsa_switch *ds, int port, + struct sk_buff *skb, unsigned int type); + }; +\end{Verbatim} +\end{frame} + +% \section{Belden TSN Switch IP} +% \label{sec:belden-tsn-switch} + +% \begin{frame}{Agenda} +% \tableofcontents[currentsection] +% \end{frame} + +% \begin{frame}{Switch IP Integration} +% \begin{block}{Belden TSN Switch IP Architecture} +% \begin{itemize} +% \item Switch IP has three ports +% \item One CPU port and two switch ports +% \item CPU port is connected to a regular Ethernet controller +% \end{itemize} +% \end{block} +% \begin{block}{What's needed?} +% \begin{enumerate} +% \item DSA driver +% \item Support for Belden's switch tagging protocol +% \item Support for PTP +% \end{enumerate} +% \end{block} +% \end{frame} + +\section{References} +\label{sec:references} + +\begin{frame}{Agenda} + \tableofcontents[currentsection] +\end{frame} + +\begin{frame}[allowframebreaks]{References} + \bibliographystyle{IEEEtranM} + \bibliography{ref_dsa_en} +\end{frame} + +\input{tailpres} |