Flash-Memory: new Technology presentation

This new technology presentation describes the Flash-Memory technology,
the functional principles and the side effects. It can be used as an
introduction to a one-day session about Flash-Memory and Flash-Filesystems.

Signed-off-by: Holger Dengler <dengler@linutronix.de>

2 files changed, 190 insertions, 0 deletions

diff --git a/flash-memory/technology/Makefile b/flash-memory/technology/Makefile
new file mode 100644
index 0000000..d641258
--- /dev/null
+++ b/flash-memory/technology/Makefile
@@ -0,0 +1,9 @@
+all:
+	for pdf in `ls -1 *.tex` ; do \
+		TEXINPUTS=`pwd`/../..:.:..:$(TEXINPUTS) pdflatex $$pdf; \
+		TEXINPUTS=`pwd`/../..:.:..:$(TEXINPUTS) pdflatex $$pdf; \
+	done
+
+clean:
+	rm -f *.aux *.log *.pdf *.log *.snm *.toc *.vrb *.nav *.out
+
diff --git a/flash-memory/technology/pres_technology_en.tex b/flash-memory/technology/pres_technology_en.tex
new file mode 100644
index 0000000..546a1be
--- /dev/null
+++ b/flash-memory/technology/pres_technology_en.tex
@@ -0,0 +1,181 @@
+\def\lximg{/usr/share/lx/icons/fueller.png}
+
+\input{configpres}
+
+\subsection{Technology}
+
+\title{Flash-Memory Technology}
+\maketitle
+
+\def\lximg{none}
+
+\begin{frame}
+\frametitle{Contents}
+\tableofcontents
+\end{frame}
+
+\subsubsection{Structure and Function}
+\begin{frame}[fragile]
+\frametitle{Single Cell Structure}
+\begin{itemize}
+\item Base element: MOSFET with a floating gate (FGMOS)
+\item Organization of cells in blocks and pages
+\end{itemize}
+\begin{figure}[h]
+\centering
+\includegraphics[scale=0.5]{images/fmtech-fgmos.png}
+\end{figure}
+\end{frame}
+
+\begin{frame}[fragile]
+\frametitle{Read}
+\begin{figure}[h]
+\centering
+\includegraphics[scale=0.4]{images/fmtech-single_read.png}
+\end{figure}
+\end{frame}
+
+\begin{frame}[fragile]
+\frametitle{Write (Program)}
+\begin{figure}[h]
+\centering
+\includegraphics[scale=0.4]{images/fmtech-single_program.png}
+\end{figure}
+\end{frame}
+
+\begin{frame}[fragile]
+\frametitle{Erase}
+\begin{figure}[h]
+\centering
+\includegraphics[scale=0.4]{images/fmtech-single_erase.png}
+\end{figure}
+\end{frame}
+
+\subsubsection{Flash-Memory Types}
+\begin{frame}[fragile]
+\frametitle{Overview}
+\begin{itemize}
+\item NOR
+\item NAND
+\item Single- and Multi-Level Cells
+\end{itemize}
+\end{frame}
+
+\begin{frame}[fragile]
+\frametitle{NOR}
+\begin{itemize}
+\item direct addressable
+\item usable like RAM/ROM (direct attach to CPU)
+\item pros:
+  \begin{itemize}
+  \item fault tolerant
+  \item high write-rate for small data
+  \end{itemize}
+\item cons:
+  \begin{itemize}
+  \item low data density (multiple gates per bit)
+  \item low write-rate for large data
+  \item cost
+  \end{itemize}
+\end{itemize}
+\end{frame}
+
+\begin{frame}[fragile]
+\frametitle{NAND}
+\begin{itemize}
+\item matrix organization (blocks and pages)
+\item addressing via controller logic
+\item pros:
+  \begin{itemize}
+  \item cost
+  \item high data density (1 to many bits per gate)
+  \item high read-/write-rate for large data
+  \item no layout change in hardware for more capacity
+  \end{itemize}
+\item cons:
+  \begin{itemize}
+  \item large effort for extensive Error Correction Codes (ECC)
+  \end{itemize}
+\end{itemize}
+\end{frame}
+
+\begin{frame}[fragile]
+\frametitle{Data density}
+\begin{itemize}
+\item Single-Level Cells (SLC)
+  \begin{itemize}
+  \item ca. 100,000 write/delete cycles
+  \item pros:
+    \begin{itemize}
+    \item robust
+    \item low Error Correction Code (ECC) effort
+    \end{itemize}
+  \item cons:
+    \begin{itemize}
+    \item low data density
+    \end{itemize}
+  \end{itemize}
+\end{itemize}
+\pause
+\begin{itemize}
+\item Multi-Level Cells (MLC)
+  \begin{itemize}
+  \item ca. 3,000 to 10,000 write/delete cycles
+  \item pros:
+    \begin{itemize}
+    \item high data density
+    \end{itemize}
+  \item cons:
+    \begin{itemize}
+    \item expensive Error Correction Codes (ECC) like BCH
+    \item wear prone
+    \item low read-rate
+    \end{itemize}
+  \end{itemize}
+\end{itemize}
+\end{frame}
+
+\subsubsection{NAND block operations and side effects}
+\begin{frame}[fragile]
+\frametitle{Read}
+\begin{figure}[h]
+\centering
+\includegraphics[width=10cm]{images/fmtech-read.png}
+\end{figure}
+\end{frame}
+
+\begin{frame}[fragile]
+\frametitle{Read Disturb}
+\begin{figure}[h]
+\centering
+\includegraphics[width=10cm]{images/fmtech-read_disturb.png}
+\end{figure}
+\end{frame}
+
+\begin{frame}[fragile]
+\frametitle{Write}
+\begin{figure}[h]
+\centering
+\includegraphics[width=10cm]{images/fmtech-write.png}
+\end{figure}
+\end{frame}
+
+\begin{frame}[fragile]
+\frametitle{Write Disturb}
+\begin{figure}[h]
+\centering
+\includegraphics[width=10cm]{images/fmtech-write_disturb.png}
+\end{figure}
+\end{frame}
+
+\subsection{}
+\begin{frame}
+\frametitle{References}
+\begin{thebibliography}{99}
+% \bibitem{FLASHMEM} David Woodhouse. Presentation \emph{Flash Memory}, 2012.  http://david.woodhou.se/dwmw2-kr-2012-09.odp 
+\bibitem{FLASHMEM} David Woodhouse. Presentation \emph{Flash Memory}, 2012.
+\href{http://david.woodhou.se/dwmw2-kr-2012-09.odp}{http://david.woodhou.se/dwmw2-kr-2012-09.odp} 
+\end{thebibliography} 
+\end{frame}
+
+\input{tailpres}